Propagation delays through the gate array are affected by temperature,voltage and production variation. The worst-case delay for a given net, TWC, may be expressed as follows:

where KT is the temperature factor from Table 9, KV is the voltage factor from Table 8, KO is the processing factor (), and is the sum of all typical delays at 25C and 5.0V (datasheet values). Note that the worst-case is at high temperature and low voltage.